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INTEGRATED CIRCUITS
74ALVCHT16835 18-bit registered driver (3-State)
Product data 2002 Jun 05
Philips Semiconductors
Philips Semiconductors
Product data
18-bit registered driver (3-State)
74ALVCHT16835
FEATURES
* Wide supply voltage range of 2.3 V to 3.6 V * Complies with JEDEC standard no. 8-1A. * CMOS low power consumption * Direct interface with TTL levels * Current drive 24 mA at 3.0 V * MULTIBYTETM flow-through standard pin-out architecture * Low inductance multiple VCC and GND pins for minimum noise
and ground bounce
PIN CONFIGURATION
NC NC Y1 GND Y2 Y3 VCC Y4 Y5 Y6 GND Y7 Y8 Y9 Y10 Y11 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 GND NC A1 GND A2 A3 VCC A4 A5 A6 GND A7 A8 A9 A10 A11 A12 GND A13 A14 A15 VCC A16 A17 GND A18 CP GND
* Output drive capability 50 transmission lines @ 85 C * ESD protection exceeds 1500 V HBM per JESD22-A114, A115
and 1000 V CDM per JESD22-C101
* Bus hold on data inputs eliminates the need for external
pullup/pulldown resistors
DESCRIPTION
The 74ALVCHT16835 is a 18-bit registered driver. Data flow is controlled by active low output enable (OE), active high latch enable (LE) and clock inputs (CP). When LE is HIGH, the A to Y data flow is transparent. When LE is LOW and CP is held at LOW or HIGH, the data is latched; on the LOW to HIGH transient of CP the A-data is stored in the latch/flip-flop. When OE is LOW the outputs are active. When OE is HIGH, the outputs go to the high impedance OFF-state. Operation of the OE input does not affect the state of the latch/flip-flop. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
Y12 GND Y13 Y14 Y15 VCC Y16 Y17 GND Y18 OE LE
SH00188
QUICK REFERENCE DATA
GND = 0 V; Tamb = 25 C; tr = tf 2.5 ns SYMBOL tPHL/tPLH fmax CI CI/O PARAMETER Propagation delay An to Yn; LE to Yn; CP to Yn Maximum clock frequency Input capacitance Input/Output capacitance transparent mode Output enabled Output disabled Clocked mode Output enabled Output disabled CONDITIONS VCC = 3.3 V, CL = 50 pF VCC = 3.3 V, CL = 50 pF TYPICAL 2.3 2.7 2.2 350 4.0 8.0 13 3 22 15 UNIT ns MHz pF pF
CPD
Power dissipation capacitance per buffer
VI = GND to VCC1
pF
NOTES: 1. CPD is used to determine the dynamic power dissipation (PD in W): PD = CPD x VCC2 x fi + S (CL x VCC2 x fo) where: fi = input frequency in MHz; CL = output load capacitance in pF; fo = output frequency in MHz; VCC = supply voltage in V; S (CL x VCC2 x fo) = sum of outputs.
2002 Jun 05
2
853-2350 28376
Philips Semiconductors
Product data
18-bit registered driver (3-State)
74ALVCHT16835
ORDERING INFORMATION
PACKAGES 56-Pin Plastic TSSOP (TVSOP), 0.4 mm pitch TEMPERATURE RANGE -40 to +85 C ORDER CODE 74ALVCHT16835DGV DRAWING NUMBER SOT481-2
PIN DESCRIPTION
PIN NUMBER 1, 2, 55 3, 5, 6, 8, 9, 10, 12, 13, 14, 15, 16, 17, 19, 20, 21, 23, 24, 26 4, 11, 18, 25, 29, 32, 39, 46, 53, 56 7, 22, 35, 50 27 28 30 54, 52, 51, 49, 48, 47, 45, 44, 43, 42, 41, 40, 38, 37, 36, 34, 33, 31 SYMBOL NC Y1 to Y18 GND VCC OE LE CP A1 to A18 NAME AND FUNCTION No connection Data outputs
LOGIC SYMBOL
OE
Ground (0 V)
CP
Positive supply voltage Output enable input (active LOW) Latch enable input Clock input Data inputs
A1 D LE CP Y1 LE
TO THE 17 OTHER CHANNELS
SH00203
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Philips Semiconductors
Product data
18-bit registered driver (3-State)
74ALVCHT16835
LOGIC SYMBOL (IEEE/IEC)
OE CP LE 27 30 28 G7 EN5 3C4
FUNCTION TABLE
INPUTS OE H L L L L L L H L X Z = = = = = LE X H H L L L L CP X X X H L A X L H L H X X OUTPUTS Z L H L H Y01 Y02
Y1 Y2 Y3 Y4 Y5 Y6 Y7 Y8 Y9 Y10 Y11 Y12 Y13 Y14 Y15 Y16 Y17 Y18
3 5 6 8 9 10 12 13 14 15 16 17 19 20 21 23 24 25
4D
1, 2
54 52 51 49 48 47 45 44 43 42
A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18
HIGH voltage level LOW voltage level Don't care High impedance "off" state LOW-to-HIGH level transition
8D
5, 6
41 40 38 37 36 34 33 31
NOTES: 1. Output level before the indicated steady-state input conditions were established, provided that CP is high before LE goes low. 2. Output level before the indicated steady-state input conditions were established.
SH00190
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Philips Semiconductors
Product data
18-bit registered driver (3-State)
74ALVCHT16835
RECOMMENDED OPERATING CONDITIONS
SYMBOL PARAMETER DC supply voltage 2.5 V range (for max. speed performance @ 30 pF output load) VCC DC supply voltage 3.3 V range (for max. speed performance @ 50 pF output load) DC supply voltage (for low-voltage applications) VI VO Tamb tr, tf DC Input voltage range DC output voltage range Operating free-air temperature range Input rise and fall times VCC = 2.3 to 3.0 V VCC = 3.0 to 3.6 V CONDITIONS MIN 2.3 3.0 2.3 0 0 -40 0 0 MAX 2.7 3.6 3.6 VCC VCC +85 20 10 V V C ns/V V UNIT
ABSOLUTE MAXIMUM RATINGS
In accordance with the Absolute Maximum Rating System (IEC 134). Voltages are referenced to GND (ground = 0 V). SYMBOL VCC IIK VI IOK VO IO IGND, ICC Tstg PTOT JA PARAMETER DC supply voltage DC input diode current DC input voltage DC output diode current DC output voltage DC output source or sink current DC VCC or GND current Storage temperature range Power dissipation per package -plastic thin-medium-shrink (TSSOP) Package thermal impedance For temperature range: -40 to +125 C above +55C derate linearly with 8 mW/K See Note 2 VI t0 For control pins1 For data inputs1 VO uVCC or VO t 0 Note 1 VO = 0 to VCC CONDITIONS RATING -0.5 to +4.6 -50 -0.5 to +4.6 -0.5 to VCC +0.5 "50 -0.5 to VCC +0.5 "50 "100 -65 to +150 600 93 UNIT V mA V mA V mA mA C mW C/W
NOTE: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. The package thermal impedance is calculated in accordance with JESD 51.
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Philips Semiconductors
Product data
18-bit registered driver (3-State)
74ALVCHT16835
DC ELECTRICAL CHARACTERISTICS
Over recommended operating conditions. Voltage are referenced to GND (ground = 0 V). LIMITS SYMBOL PARAMETER TEST CONDITIONS Temp = -40 to +85 C MIN VIH HIGH level Input voltage VCC = 2.3 to 2.7 V VCC = 2.7 to 3.6 V LOW level Input voltage VCC = 2.3 to 2.7 V VCC = 2.7 to 3.6 V VCC = 2.3 to 3.6 V; VI = VIH or VIL; IO = -100 A VCC = 2.3 V; VI = VIH or VIL; IO = -6 mA VOH HIGH level output voltage g VCC = 2.3 V; VI = VIH or VIL; IO = -12 mA VCC = 2.7 V; VI = VIH or VIL; IO = -12 mA VCC = 3.0 V; VI = VIH or VIL; IO = -12 mA VCC = 3.0 V; VI = VIH or VIL; IO = -24 mA VCC = 2.3 to 3.6 V; VI = VIH or VIL; IO = 100 A VCC = 2.3 V; VI = VIH or VIL; IO = 6 mA VOL O LOW level output voltage VCC = 2.3 V; VI = VIH or VIL; IO = 12 mA VCC = 2.7 V; VI = VIH or VIL; IO = 12 mA VCC = 3.0 V; VI = VIH or VIL; IO = 24 mA VCC = 2 3 V; VI = 0 7 V 2.3 0.7 VCC = 2.3 V; VI = 1.7 V II(hold) VCC = 3.0 V; VI = 0.8 V VCC = 3.0 V; VI = 2.0 V VCC = 3.6 V; VI = 0 to 3.6 V II IOZ ICC ICC Ci Co g Input leakage current 3-State output OFF-state current Quiescent supply current Additional quiescent supply current Control inputs Data inputs Outputs VCC = 2 3 to 3 6 V; 2.3 3.6 VI = VCC or GND VCC = 2.3 to 3.6 V; VI = VIH or VIL; VO = VCC or GND VCC = 2.3 to 3.6 V; VI = VCC or GND; IO = 0 VCC = 2.3 V to 3.6 V; VI = VCC - 0.6 V; IO = 0 VI = VCC or GND VCC = 3.3 V VO = VCC or GND VCC = 3.3 V 1.7 2.0 -- -- VCC*0.2 02 VCC*0.3 VCC*0.6 VCC*0.5 VCC*0.6 VCC*1.0 -- -- -- -- -- 45 -45 75 -75 -- -- -- -- -- -- -- -- TYP1 1.2 1.5 1.2 1.5 VCC VCC*0.08 VCC*0.26 VCC*0.14 VCC*0.09 VCC*0.28 GND 0.07 0.15 0.14 0.27 -- -- -- -- -- 0.1 0.1 30 150 3.5 6 7 MAX -- V -- 0.7 V 0.8 -- -- -- -- -- -- 0.20 0 20 0.40 0.70 0.40 0.55 -- -- -- -- 500 5 10 60 400 -- pF -- -- pF A A A A A V V V V UNIT
VIL
NOTE: 1. All typical values are at Tamb = 25 C.
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Philips Semiconductors
Product data
18-bit registered driver (3-State)
74ALVCHT16835
AC CHARACTERISTICS FOR VCC = 2.3 V TO 2.7 V RANGE
GND = 0 V; tr = tf 2.0 ns; CL = 30 pF SYMBOL Propagation delay An to Yn tPHL/tPLH Propagation delay LE to Yn Propagation delay CP to Yn tPZH/tPZL tPHZ/tPLZ tW tS SU th tsk fmax 3-State output enable time OE to Yn 3-State output disable time OE to Yn CP pulse width HIGH or LOW LE pulse width HIGH Set-up time An to CP Set-up time An to LE Hold time An to CP Hold time An to LE Output skew Maximum clock pulse frequency 4, 7 LIMITS PARAMETER WAVEFORM MIN 1, 7 2, 7 4, 7 6, 7 6, 7 4, 7 2, 7 5, 7 3, 7 5, 7 3, 7 1.3 1.4 1.2 1.4 1.0 3.3 3.3 0.1 0.7 0.4 0.1 -- 150 VCC = 2.3 to 2.7 V TYP1 3.0 3.6 3.0 3.7 2.5 -- -- -- -- -- -- -- -- MAX 4.7 5.7 4.7 5.3 3.7 -- -- -- -- -- -- 0.5 -- ns ns ns ns ns ns MHz ns UNIT
NOTE: 1. All typical values are at VCC = 2.5 V and Tamb = 25 C. 2. Output skew is not production tested
AC CHARACTERISTICS FOR VCC = 3.0 V TO 3.6 V RANGE AND VCC = 2.7 V
GND = 0 V; tr = tf 2.5 ns; CL = 50 pF SYMBOL LIMITS PARAMETER Propagation delay An to Yn tPHL/tPLH Propagation delay LE to Yn Propagation delay CP to Yn tPZH/tPZL tPHZ/tPLZ tW tS SU th tsk fmax 3-State output enable time OE to Yn 3-State output disable time OE to Yn CP pulse width HIGH or LOW LE pulse width HIGH Set-up time An to CP Set-up time An to LE Hold time An to CP Hold time An to LE Output skew3 Maximum clock pulse frequency 4, 7 WAVEFORM VCC = 3.3 0.3 V MIN 1, 7 2, 7 4, 7 6, 7 6, 7 4, 7 2, 7 5, 7 3, 7 5, 7 3, 7 1.2 1.3 1.0 1.0 1.0 2.0 2.0 0.1 0.5 0.4 0.1 -- 150 TYP1, 2 2.3 2.7 2.2 2.3 2.5 -- -- -- -- -- -- -- -- MAX 3.6 4.2 3.7 3.8 3.7 -- -- -- -- -- -- -- -- MIN 1.3 1.4 1.2 1.4 1.0 2.0 2.0 0 0 0.5 0.25 -- 150 LIMITS VCC = 2.7 V TYP1 2.7 3.0 2.3 2.4 2.5 -- -- -- -- 0.3 0.4 -- -- MAX 3.8 4.9 3.7 4.2 3.7 -- -- -- -- -- -- 0.5 -- ns ns ns ns ns ns MHz ns UNIT
NOTES: 1. All typical values are measured Tamb = 25 C. 2. Typical value is measured at VCC = 3.3 V 3. Output skew is not production tested 2002 Jun 05 7
Philips Semiconductors
Product data
18-bit registered driver (3-State)
74ALVCHT16835
AC WAVEFORMS FOR VCC = 3.0 V TO 3.6 V AND VCC = 2.7 V RANGE
VM = 1.5 V VX = VOL + 0.3 V VY = VOH - 0.3 V VOL and VOH are the typical output voltage drop that occur with the output load. VI = 2.7 V
1/fMAX VI CP INPUT GND VM tW VM
tPHL
VOH Yn OUTPUT VOL VM
tPLH
AC WAVEFORMS FOR VCC = 2.3 V TO 2.7 V AND VCC < 2.3 V RANGE
VM = 0.5 VCC VX = VOL + 0.15 V VY = VOH - 0.15 V VOL and VOH are the typical output voltage drop that occur with the output load. VI = VCC
VI An INPUT GND tPHL VOH Yn OUTPUT VOL NOTE: VM = 0.5VCC at VCC = 2.3 to 2.7 V VM tPLH VM
NOTE: VM = 0.5VCC at VCC = 2.3 to 2.7 V
SH00135
Waveform 4. The clock (CP) to Yn propagation delays, the clock pulse width and the maximum clock frequency.
VI CP INPUT GND tsu th tsu th VM
VI An INPUT GND VOH Yn OUTPUT
SH00132
VOL NOTE: The shaded areas indicate when the input is permitted to change for predictable output performance. VM = 0.5VCC at VCC = 2.3 to 2.7 V SH00136
Waveform 1. Input (An) to output (Yn) propagation delay
VI LE INPUT GND VM tW VM
Waveform 5. Data set-up and hold times for the An input to the clock CP input
tPHL
VOH Yn OUTPUT VOL VM
tPLH
VI nOE INPUT GND VM
NOTE: VM = 0.5VCC at VCC = 2.3 to 2.7V
SH00134
Waveform 2. Latch enable input (LE) pulse width, the latch enable input to output (Yn) propagation delays.
VCC OUTPUT LOW-to-OFF OFF-to-LOW VX VOL VM
An INPUT
GND
VI LE INPUT
GND NOTE: The shaded areas indicate when the input is permitted to change for predictable output performance. VM = 0.5VCC at VCC = 2.3 to 2.7V
Waveform 3. Data set-up and hold times for the An input to the LE input
2002 Jun 05
EEE E EEEEEEEEE EEE EEEEEEE EEE
VI
VM
th
th
VOH OUTPUT HIGH-to-OFF OFF-to-HIGH GND outputs enabled NOTE: VM = 0.5VCC at VCC = 2.3 to 2.7 V outputs disabled outputs enabled VY VM
tSU
tSU
VM
SH00133
Waveform 6. 3-State enable and disable times
8
EEEEEEEEEEEE EE EEEEEEEEEEEE EE EEEEEEEEEEEE EE
VM tPLZ tPZL tPHZ tPZH
SH00137
Philips Semiconductors
Product data
18-bit registered driver (3-State)
74ALVCHT16835
TEST CIRCUIT
VCC S1 2 * VCC Open GND
VI PULSE GENERATOR RT D.U.T.
VO
RL = 500
CL
RL = 500
Test Circuit for switching times DEFINITIONS
RL = Load resistor CL = Load capacitance includes jig and probe capacitance RT = Termination resistance should be equal to ZOUT of pulse generators.
SWITCH POSITION
TEST tPLH/tPHL tPLZ/tPZL tPHZ/tPZH S1 Open 2 < VCC
GND
VCC < 2.7V 2.7-3.6V
VI VCC 2.7V
SV00906
Waveform 7. Load circuitry for switching times
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Philips Semiconductors
Product data
18-bit registered driver (3-State)
74ALVCHT16835
TSSOP56: plastic thin shrink small outline package; 56 leads; body width 4.4 mm
SOT481-2
D
E
A X
c y HE vMA
Z 56 29
A
A2 A1
(A 3)
pin 1 index Lp L detail X 1 28 bp wM
e
0
2.5 scale
5 mm
DIMENSIONS (mm are the original dimensions) UNIT
mm
A max.
1.2
A1
0.15 0.05
A2
1.05 0.80
A3
0.25
bp
0.23 0.13
c
0.20 0.09
D (1)
11.4 11.2
E (2)
4.5 4.3
e
0.4
HE
6.6 6.2
L
1
Lp
0.75 0.45
v
0.2
w
0.07
y
0.08
Z (1)
0.4 0.1
8o 0o
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
OUTLINE VERSION
SOT481-2
REFERENCES IEC
---
JEDEC
MO-194
JEITA
---
EUROPEAN PROJECTION
ISSUE DATE
01-11-24
2002 Jun 05
10
Philips Semiconductors
Product data
18-bit registered driver (3-State)
74ALVCHT16835
NOTES
2002 Jun 05
11
Philips Semiconductors
Product data
18-bit registered driver (3-State)
74ALVCHT16835
Data sheet status
Data sheet status [1] Objective data Preliminary data Product status [2] Development Qualification Definitions This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Changes will be communicated according to the Customer Product/Process Change Notification (CPCN) procedure SNW-SQ-650A.
Product data
Production
[1] Please consult the most recently issued data sheet before initiating or completing a design. [2] The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com.
Definitions
Short-form specification -- The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition -- Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information -- Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification.
Disclaimers
Life support -- These products are not designed for use in life support appliances, devices or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes -- Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified.
Contact information
For additional information please visit http://www.semiconductors.philips.com. Fax: +31 40 27 24825
(c) Koninklijke Philips Electronics N.V. 2002 All rights reserved. Printed in U.S.A. Date of release: 06-02
For sales offices addresses send e-mail to: sales.addresses@www.semiconductors.philips.com.
Document order number:
9397 750 09943
Philips Semiconductors
2002 Jun 05 12

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